Toward High Communication Performance through Compiled Communications on a Circuit Switched Interconnection Network

This paper discusses a new principle of int.erronnection network for massively parallel arc,hit,ect,ures in t,he field of numerical comput,at,ion. The principle is motivated by an analysis of the applirat,ion feat,ures and the need to design new kind of rommunication networks combining very high hantlwidt,h, very low latency, performance independence t,o communication pattern or network load anci a performance improvement, proportional to the hardwarr performancr improvement.. Our approach is t,o assor.iat,e compiled communications and a rircnit, swit,chetl irherconnection network. This paper presentas the mot,ivations for this principle, the hardware anci soft,ware issues and the design of a first prototype. The expectmecl performance are a sustained aggregate t)andwitlt,h of more than SOOGBytes/s and an overall ladrnry less t,han 27Ons, for a large implement,at.ion (4K inpnt,s) wit,h the current available t.echnology